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Publikationen

Fully electronic CMOS DNA detection array based on capacitance measurement with on-chip analog-to-digital conversion

C. Stagni degli Esposti, C. Guiducci, C. Paulus, M. Schienle, M. Ausgustyniak, G. Zuccheri, B. Samori, L. Benini, B. Ricco, and R. Thewes

IEEE J. Solid-State Circuits Volume: 41(12)pp. 2956-2964, 2006.

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Fast Kerf- and Tester-Compatible Method for RC Characterization of DRAM Memory Cells

J. Sauerbrey, B. Holzapfl, M. Unertl, T. Haywood, E. Wohlrab, and R. Thewes

pp. 419-422, 2006. Conference Location: Montreux


High-resolution multi-transistor array recording of electrical field potentials in cultured brain slices

M. Hutzler, A. Lambacher, B. Eversmann, M. Jenkner, R. Thewes, and P. Fromherz

(96)pp. 1638-1645, 2006.


A physics-based low frequency noise model for MOSFETs under periodic large signal excitation

R. Brederlow, J. Koh, and R. Thewes

J. Solid-State Electronics Volume: 50(4)pp. 668-673, 2006.

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A 24x16 CMOS-based chronocoulometric DNA mircoarray

M. Augustyniak, C. Paulus, R. Brederlow, N. Persike, G. Hartwich, D. Schmitt-Landsiedel, and R. Thewes

pp. 59-68, 2006. Conference Location : San Francisco, CA


Fully electronic CMOS DNA detection array based on capacitance measurement with on-chip analog-to-digital conversion

C. Stagni degli Esposti, C. Guiducci, C. Paulus, M. Schienle, M. Ausgustyniak, G. Zuccheri, B. Samori, L. Benini, B. Ricco, and R. Thewes

pp. 69-78, 2006. Conference Location: San Francisco, CA


A 0.6V 70dB SNR 0.3MHz BW Multibit Switched-Opamp Sigma-Selta Modulator

J. Sauerbrey and R. Thewes

pp. 492-495, 2006. Conference Location: Montreux


Low Frequency Noise Considerations for CMOS Analog Circuit Design

R. Brederlow, J. Koh, G. I. Wirth, R. da Silva, M. Tiebout, and R. Thewes

Proc. Conf. American Institute of Physics Volume: 780(1)pp. 703-708, 2005.

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Efficiency of body biasing in 90 nm CMOS for low power digital circuits

K. von Arnim, E. Borinski, P. Seegebrecht, H. Fiedler, R. Brederlow, R. Thewes, J. Berthold, and C. Pacha

IEEE J. Solid-State Circuits Volume: 40(7)pp. 1549-1556, 2005.

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